Zilog Z08470 Manual do Utilizador descarregar pdf (Página 37)

UM008101-0601 Counter/Timer Channels

automatic features in the interrupt control logic, one pre-programmed

interrupt vector suffices for all four channels.

Loading The Channel Control Register

To load a Channel Control Word, the CPU performs a normal I/O Write

sequence to the port address corresponding to the desired CTC channel. The

CTC input pins CS0 and CS1 are used to form a 2-bit binary address to select

one of four channels within the device. (See Table 2 on page 5.) In many

system architectures, these two input pins are connected to Address Bus lines

A0 and A1, respectively, so that the four channels in a CTC device occupy

contiguous I/O port addresses. A word written to a CTC channel is

interpreted as a channel control word, and loaded into the channel control

modes and conditions as indicated in Table 2.

Table 5. Channel Control Register

76543210

Interrupt Mode Prescaler

Val ue*

CLK/TRG

Section

Time

Trigger*

Time

Constant

Reset Control or

Vec tor

R/W R/W R/W R/W R/W R/W R/W R/W

Bit

Number Field R/W Value Description

7 Interrupt R/W 1

Enable Interrupt

Disable Interrupt

6Mode R/W1

COUNTER Mode

TIMER Mode

5 Prescaler Value* R/W 1

256

*TIMER mode only

1 2 ... 32 33 34 35 36 37 38 39 40 41 42 ... 329 330

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Zilog Z08470 Manual do Utilizador Página 37