
eZ8
™
CPU Core
User Manual
UM012820-0810 ADCX Instruction
78
Attributes
Escaped Mode Addressing
Using Escaped Mode Addressing, address mode ER for the source or des-
tination can specify a working register with 4-bit addressing.
If the high byte of the source or destination address is EEh (11101110b),
a working register is inferred. For example, the operand
EE3h selects
Working Register R3. The full 12-bit address is provided by
{RP[3:0],RP[7:4], 3h}.
To access registers on Page Eh (addresses E00h to EFFh), set the Page
Pointer, RP[3:0], to
Eh and set the Working Group Pointer, RP[7:4], to
the preferred Working Group.
Sample Usage
If Register 634h contains the value 2Eh, the Carry flag is set, and Regis-
ter B12h contains the value 1bh, the following statement leaves the value
4Ah in Register 634h, sets the H flag, and clears the C, Z, S, V, and D
flags:
ADCX
634h
,
B12h
Object Code: 18 B1 26 34
Using Escaped Mode Addressing, if Working Register R4 contains the
value
2Eh, the Carry flag is set, and Register B12h contains the value
1bh, the following statement leaves the value 4Ah in Working Register
R4, sets the H flag, and clears the C, Z, S, V, and D flags:
Mnemonic
Destination,
Source
Op
Code
(Hex) Operand 1 Operand 2 Operand 3
ADCX ER1, ER2 18 ER2[11:4] {ER2[3:0],
ER1[11:8]}
ER1[7:0]
ADCX ER1, IM 19 IM {0h,
ER1[11:8]}
ER1[7:0]
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