
eZ8
™
CPU Core
User Manual
UM012820-0810 Address Space
22
Bit Addressing
Many eZ8 CPU instructions allow access to individual bits within regis-
ters. Figure 6 displays how the instruction AND R15, MASK can clear an
individual bit.
Figure 5. 16-Bit Register Pair Addressing
Figure 6. Bit Addressing Example
MSB
LSB
Rn Rn+1
n = Even Address
0 1 1 1 0 0 0 0R15
1 1 0 1 1 1 1 1 MASK = DFh
0 1 0 1 0 0 0 0R15
Bit
0
Bit
7
AND R15, DFh ; Clear Bit 5 of Working Register 15
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