
eZ8
™
CPU Core
User Manual
UM012820-0810 TCMX Instruction
243
Attributes
Escaped Mode Addressing
Using Escaped Mode Addressing, address mode ER for the source or des-
tination specifies a working register with 4-bit addressing.
If the high byte of the source or destination address is EEh (11101110b),
a working register is inferred. For example, the operand
EE3h selects
Working Register R3. The full 12-bit address is provided by
{RP[3:0],
RP[7:4], 3h}
.
To access registers on Page Eh (addresses E00h to EFFh), set the Page
Pointer, RP[3:0], to
Eh and set the Working Group Pointer, RP[7:4], to
the preferred Working Group.
Sample Usage
If Register DD4h contains the value 04h (00000100b), and Register
420h contains the value 80h (10000000b) (testing bit 7 if it is 1), the fol-
lowing statement resets the Z flag (because bit 7 in the destination oper-
and is not a 1), sets the S flag, and clears the V flag.
TCMX
DD4h
,
420h
Object Code: 68 42 0D D4
If Register B52h contains the value F2h (11110010b), the following
statement tests bit 1 of the destination operand for 1, sets the Z flag (indi
-
cating bit 1 in the destination operand is 1) and clears the S and V flags:
TCMX
B52h
, #02h
Object Code: 66 02 0b 52
Mnemonic
Destination,
Source
Op Code
(Hex) Operand 1 Operand 2 Operand 3
TCMX ER1, ER2 68 ER2[11:4] {ER2[3:0],
ER1[11:8]}
ER1[7:0]
TCMX ER1, IM 69 IM {0h,
ER1[11:8]}
ER1[7:0]
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