Zilog Z08470 Manual do Utilizador descarregar pdf (Página 61)

UM008007-0715 Arithmetic and Logical

Z80 CPU

User Manual

The INC and DEC instructions specify a register or a memory location as both the source

and the destination of the result. When the source operand is addressed using the index

registers, the displacement must directly follow. With immediate addressing, the actual

operand directly follows. As an example, the AND

07h instruction is shown in Figure 38.

Assuming that the Accumulator contains the value

F3h, the result of 03h is placed in the

Accumulator:

The Add (ADD) instruction performs a binary add between the data in the source location

and the data in the Accumulator. The Subtract (SUB) instruction performs a binary sub-

traction. When an Add with Carry (ADC) or Subtract with Carry (SBC) instruction is

specified, the Carry flag is also added or subtracted, respectively. The flags and the Deci-

mal Adjust (DAA) instruction in the Z80 CPU allow arithmetic operations for processing

the following items:

• Multiprecision packed BCD numbers

• Multiprecision signed or unsigned binary numbers

• Multiprecision two’s complement signed numbers

Other instructions in this group are the Logical And (AND), Logical Or (OR), Exclusive

Or (XOR), and Compare (CP) instructions.

Five general-purpose arithmetic instructions operate on the Accumulator or Carry flag.

These five instructions are listed in Table 11.

Figure 38. Example of an AND Instruction Sequence

Accumulator before operation 1111 0011 = F3h

Operand 0000 0111 = 07h

Result to Accumulator 0000 0011 = 03h

Table 11. General-Purpose AF Operation

Decimal Adjust Accumulator (DAA) 27

Complement Accumulator (CPL) 2F

Negate Accumulator (NEG)

(two’s complement

Complement Carry Flag (CCF) 3F

Set Carry Flag (SCF) 37

Address A

A+1

Op Code

Operand

1 2 ... 56 57 58 59 60 61 62 63 64 65 66 ... 325 326

Sem comentários

Zilog Z08470 Manual do Utilizador Página 61