
List of Figures UM008007-0715
xi
Z80 CPU
User Manual
Figure 29. Extended Addressing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 30. Indexed Addressing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 31. Register Indirect Addressing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 32. Example of a 3-Byte Load Indexed Instruction Sequence . . . . . . . . . . . . . 41
Figure 33. Example of a 3-Byte Load Extended Instruction Sequence . . . . . . . . . . . . 42
Figure 34. Example of a 2-Byte Load Immediate Instruction Sequence . . . . . . . . . . . 42
Figure 35. Example of a 4-Byte Load Indexed/Immediate Instruction Sequence . . . . 42
Figure 36. Example of a 16-Bit Load Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 37. Example of a 2-Byte Load Indexed/Immediate Instruction Sequence . . . . 45
Figure 38. Example of an AND Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 39. Rotates and Shifts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 40. Example of an Unconditional Jump Sequence . . . . . . . . . . . . . . . . . . . . . . 56
Figure 41. Mode 2 Interrupt Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Comentários a estes Manuais