
UM018809-0611 Assembly Language Introduction
ZNEO
®
CPU Core
User Manual
23
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Load
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CPU Control
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Program Control
Tables 6 through 12 list the instructions for each of the above groups and the number of
operands required for each instruction. Some instructions appear in more than one table as
these instructions can be considered members of more than one category. The abbrevia-
tions dst and src refer to destination and source operands, respectively.
Table 6. Arithmetic Instructions
Mnemonic Operands Instruction Page
ADC dst, src Add with Carry 68
ADD dst, src Add 71
CP dst, src Compare 86
CPC dst, src Compare with Carry 89
CPCZ dst Compare to Zero with Carry 92
CPZ dst Compare to Zero 94
DEC dst Decrement 96
INC dst Increment 108
MUL dst, src Multiply (32 bit) 125
NEG dst Negate 127
SBC dst, src Subtract with Carry 149
SDIV dst, src Signed Divide (32 bit) 152
SMUL dst, src Signed Multiply (64 bit) 158
SUB dst, src Subtract 169
UDIV dst, src Unsigned Divide (32 bit) 180
UDIV64 dst, src Unsigned Divide (64 bit) 182
UMUL dst, src Unsigned Multiply (64 bit) 184
Table 7. Logical Instructions
Mnemonic Operands Instruction Page
AND dst, src Logical AND 74
COM dst Complement 84
OR dst, src Logical OR 131
XOR dst, src Logical Exclusive OR 188
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