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TRAP Instruction UM018809-0611

178

ZNEO

CPU Core

User Manual

TRAP

Definition

Software Trap

Syntax

TRAP Vector

Operation

SP  SP

– 2

(SP)  {00H, FLAGS[7:0]}

SP  SP

– 4

(SP)  PC

PC  (Vector)

Description

This instruction executes a software trap. The Flags and Program Counter are pushed onto the

stack. The ZNEO CPU loads the Program Counter with the value stored in the Trap Vector quad.

Execution begins from the new value in the Program Counter. Execute an IRET instruction to

return from a software trap.

There are 256 possible Trap Vector quads. The Trap Vector Quads are numbered from 0 to 255.

The base addresses of the Trap Vector Quads begin at

0000_0000H and end at 0000_03FCH.

The base address of the Trap Vector Quad is calculated by multiplying the vector by 4.

Refer to the ZNEO product specification that is specific to your device for a list of vectors

used by the CPU and peripherals. A TRAP instruction can be used with these vectors, but

the TRAP does not set any of the exception or interrupt register bits that the corresponding

service routine is likely to inspect.

Flags

Flags are not affected by this instruction.

Syntax and Opcodes

Instruction, Operands Word 0 Word 1 Word 2

TRAP #vector8 {FEH, vector8}

Note:

1 2 ... 189 190 191 192 193 194 195 196 197 198 199 ... 215 216

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