Zilog Z16F2810 Manual do Utilizador descarregar pdf (Página 199)

UM018809-0611 UDIV64 Instruction

ZNEO

CPU Core

User Manual

183

Case 2: If the divisor is zero, the destination, source, and flags registers are unchanged,

and a Divide-by-Zero system exception is executed.

Case 3: If the integer part is greater than or equal to 4,294,967,296, the destination, source,

and flags registers are unchanged, and a Divide Overflow system exception is executed.

This instruction is generated by using the Extend prefix, 0007H, with the UDIV opcode.

Flags

Syntax and Opcodes

Example

Before:

R3=0000_00FFH, R4=FFFF_FFE5H, R5=0000_0555H

UDIV64 RR3, R5 ;Object code 0007 AE53

After:

R3=3003_002F, R4=0000_054AH, Flags Z, S, V, B=0

76543210

C Z S V B CIRQE IRQE

–* *00–––

Legend

C = No change.

Z = Set to 1 if bits [31:0] of the integer part are zero; otherwise set to 0.

S = Set to 1 if the bit [31] of the integer part is 1; otherwise set to 0.

V = Cleared to 0.

B = Cleared to 0.

CIRQE = No change.

IRQE = No change.

Instruction, Operands

Extend

Prefix Word 0 Word 1 Word 2

UDIV64 RRd, Rs 0007H {AEH, Rs, RRd}

1 2 ... 194 195 196 197 198 199 200 201 202 203 204 ... 215 216

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