Zilog Z80380 Manual do Utilizador descarregar pdf (Página 58)

5-24

Z380

™

USER'S MANUAL

DC-8297-03

ZILOG

ADD

ADD (WORD)

ADD dst,src dst = HL; src = BC, DE, HL, SP, DA

dst = IX; src = BC, DE, IX, SP

dst = IY; src = BC, DE, IY, SP

Operation: If (XM) then begin

dst(31-0) ← dst(31-0) + src(31-0)

end

else begin

dst(15-0) ← dst(15-0) + src(15-0)

end

The source operand is added to the destination and the sum is stored in the destination. The

contents of the source are unaffected. Two’s complement addition is performed. Note that

the length of the operand is controlled by the Extended/Native mode selection, which is

consistent with the manipulation of an address by the instruction.

Flags: S: Unaffected

Z: Unaffected

H: Set if there is a carry from bit 11 of the result; cleared otherwise

V: Unaffected

N: Cleared

C: Set if there is a carry from the most significant bit of the result; cleared otherwise

Addressing Execute

Mode Syntax Instruction Format Time Note

R: ADD HL,R 00rr1001 2 X

RX: ADD XY,R 11y11101 00rr1001 2 X

DA: ADD HL,(nn) 11101101 11000110 -n(low)- n(high)- 2+r I, X

Field Encodings: rr: 00 for BC, 01 for DE, 10 for register to itself, 11 for SP

y: 0 for IX, 1 for IY

1 2 ... 53 54 55 56 57 58 59 60 61 62 63 ... 267 268

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Zilog Z80380 Manual do Utilizador Página 58